CD4514BMSCD4515BMS
CMOS 4-Bit
Latch/4-to-16 Line Decoders
Pinout
CD4514BMS, CD4515BMS
TOP VIEW
STROBE1DATA 12DATA 23
S74S65S56S47S38S19S210S011VSS12
24VDD23INHIBIT22DATA 421DATA 320S1019S1118S817S916S1415S1514S1213S13
July 14, 2006
Features
•High-Voltage Types (20-Volt Rating)•CD4514BMS Output “High” on Select•CD4515BMS Output “Low” on Select•Strobed Input Latch•Inhibit Control
•100% Tested for Quiescent Current at 20V
•Maximum Input Current of 1µA at 18V Over Full Pack-age Temperature Range; 100nA at 18V and 25oC•Noise Margin (Full Package-Temperature Range): -1V at VDD = 5V-2V at VDD = 10V-2.5V at VDD = 15V•5V, 10V, and 15V Parametric Ratings
•Standardized, Symmetrical Output Characteristics•Meets all Requirements of JEDEC Tentative StandardNo. 13B, \"Standard Specifications for Description of‘B’ Series CMOS Devices\"
Functional Diagram
VDD = 24VSS = 12
11910876541817201914131615S0S1S2S3S4S5S6S7S8S9S10S11S12S13S14S15
Applications
•Digital Multiplexing•Address Decoding
•Hexadecimal/BCD Decoding•Program-counter Decoding•Control Decoder
DATA 12DATA 23DATA 321DATA 422STROBE
1
LATCH
ABCD
4 TO 16DECODER
Description
CD4514BMS and CD4515BMS consist of a 4-bit strobedlatch and a 4-to-16-line decoder. The latches hold the lastinput data presented prior to the strobe transition from 1 to 0.Inhibit control allows all outputs to be placed at0(CD4514BMS) or 1(CD4515BMS) regardless of the state ofthe data or strobe inputs.
The decode truth table indicates all combinations of datainputs and appropriate selected outputs.
These devices are similar to industry types MC14514 andMC14515.
The CD4514BMS and CD4515BMS are supplied in these 24lead outline packages:Braze Seal DIPFrit Seal DIP
Ceramic Flatpack
H4VH1ZH4P
INHIBIT23
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.1-888-INTERSIL or 1-888-468-3774|Copyright © Intersil Corporation 1999, 2006
FN3195.1
1
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Specifications CD4514BMS, CD4515BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5VDC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mAOperating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oCPackage Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oCLead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oCAt Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .θjaθjcCeramic DIP and FRIT Package. . . . .80oC/W20oC/WFlatpack Package . . . . . . . . . . . . . . . .70oC/W20oC/WMaximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K). . . . . .500mWFor TA = +100oC to +125oC (Package Type D, F, K) . . . . .Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . .100mWFor TA = Full Package Temperature Range (All Package Types)Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE1.DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETERSupply CurrentSYMBOLIDDCONDITIONS (NOTE 1)VDD = 20V, VIN = VDD or GNDVDD = 18V, VIN = VDD or GND
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20VDD = 18V
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20VDD = 18V
Output VoltageOutput VoltageOutput Current (Sink)Output Current (Sink) Output Current (Sink) Output Current (Source)Output Current (Source)Output Current (Source)Output Current (Source)N Threshold VoltageP Threshold VoltageFunctional
VOL15VOH15IOL5IOL10IOL15IOH5AIOH5BIOH10IOH15VNTHVPTHF
VDD = 15V, No LoadVDD = 15V, No Load (Note 3)VDD = 5V, VOUT = 0.4VVDD = 10V, VOUT = 0.5VVDD = 15V, VOUT = 1.5VVDD = 5V, VOUT = 4.6VVDD = 5V, VOUT = 2.5VVDD = 10V, VOUT = 9.5VVDD = 15V, VOUT = 13.5VVDD = 10V, ISS = -10µAVSS = 0V, IDD = 10µA
VDD = 2.8V, VIN = VDD or GNDVDD = 20V, VIN = VDD or GNDVDD = 18V, VIN = VDD or GNDVDD = 3V, VIN = VDD or GND
Input Voltage Low(Note 2)
Input Voltage High(Note 2)
Input Voltage Low(Note 2)
Input Voltage High(Note 2)
VILVIHVILVIH
VDD = 5V, VOH > 4.5V, VOL < 0.5VVDD = 5V, VOH > 4.5V, VOL < 0.5VVDD = 15V, VOH > 13.5V,VOL < 1.5V
VDD = 15V, VOH > 13.5V,VOL < 1.5V
GROUP ASUBGROUPS
1231231231, 2, 31, 2, 3111111111778A8B1, 2, 31, 2, 31, 2, 31, 2, 3
LIMITS
TEMPERATUREMINMAX
+25oCUNITSµAµAµAnAnAnAnAnAnAmVVmAmAmAmAmAmAmAVVV
----100-1000-100----0.531.43.5-----2.80.7
10100010---100100010050-----0.53-1.8-1.4-3.5-0.72.8
+125oC-55oC+25oC+125oC-55oC+25oC+125C-55
oCo+25oC, +125oC, -55oC
+25oC+25oC+25oC+25oC+25+25
oCoC
+25oC, +125oC, -55oC14.95
+25oC+25oC+25oC+25oC+25oC+125oC-55oC
+25oC, +125oC, -55oC+25oC, +125oC, -55oC+25oC, +125oC, -55oC+25oC, +125oC, -55oC
VOH>VOL <
VDD/2VDD/2
-3.5-11
1.5-4-
VVVV
NOTES:1.All voltages referenced to device GND, 100% testing being
implemented.
2.Go/No Go test with limits applied to inputs.
3.For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
2
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Specifications CD4514BMS, CD4515BMS
TABLE2.AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
SUBGROUPSTEMPERATURE
910, 11
VDD = 5V, VIN = VDD or GND
910, 11
VDD = 5V, VIN = VDD or GND
910, 11
+25oC+125oC, -55oC
+25oC+125oC, -55oC
+25oC+125oC, -55oC
LIMITSMIN------MAX9701310500675200270
UNITSnsnsnsnsnsns
PARAMETERPropagation DelayStrobe or DataPropagation DelayInhibit
Transition Time
SYMBOLTPHL1TPLH1TPHL2TPLH2TTHLTTLH
CONDITIONS (NOTE 1, 2)VDD = 5V, VIN = VDD or GND
NOTES:
1.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2.-55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETERSupply Current
SYMBOLIDD
CONDITIONS
VDD = 5V, VIN = VDD or GND
NOTES1, 2
TEMPERATURE-55oC, +25oC+125oC
VDD = 10V, VIN = VDD or GND
1, 2
-55oC, +25oC+125oC
VDD = 15V, VIN = VDD or GND
1, 2
-55oC, +25oC+125oC
Output VoltageOutput VoltageOutput VoltageOutput VoltageOutput Current (Sink)
VOLVOLVOHVOHIOL5
VDD = 5V, No LoadVDD = 10V, No LoadVDD = 5V, No LoadVDD = 10V, No LoadVDD = 5V, VOUT = 0.4V
1, 21, 21, 21, 21, 2
+25oC, +125oC,
-55oC+25oC, +125oC,
-55oC+25oC, +125oC,
-55oC+25oC, +125oC,
-55oC
+125oC-55oC
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1, 2
+125oC-55oC
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1, 2
+125oC-55oC
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1, 2
+125oC-55oC
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1, 2
+125oC-55oC
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
+125oC-55oC
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125oC-55oC
Input Voltage LowInput Voltage High
VILVIH
VDD = 10V, VOH > 9V, VOL < 1VVDD = 10V, VOH > 9V, VOL < 1V
1, 21, 2
+25oC, +125oC,
-55oC+25oC, +125oC,
-55oC
MIN--------4.959.950.360.640.91.62.44.2---------+7
MAX515010300106005050---------0.36-0.64-1.15-2.0-0.9-1.6-2.4-4.23-UNITSµAµAµAµAµAµAmVmVVVmAmAmAmAmAmAmAmAmAmAmAmAmAmAVV
3
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Specifications CD4514BMS, CD4515BMS
TABLE3.ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETERPropagation DelayStrobe or DatatPropagation DelayInhibit
Transition Time
SYMBOLTPHL1TPLH1TPHL2TPLH2TTHLTTLHTS
CONDITIONS
VDD = 10VVDD = 15VVDD = 10VVDD = 15VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15V
Minimum Strobe Pulse Width
TW
VDD = 5VVDD = 10VVDD = 15V
Input CapacitanceNOTES:
1.All voltages referenced to device GND.
2.The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics.3.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
CIN
Any Input
NOTES1, 2, 31, 2, 31, 2, 31, 2, 31, 2, 31, 2, 3
1, 2, 3 1, 2, 3
1, 2, 3 1, 2, 3
1, 2, 31, 2, 31, 2
TEMPERATURE
+25oC+25oC+25oC+25oC+25oC+25oC+25oC+25oC+25oC+25oC+25oC+25oC+25oC
MIN----- --------MAX370270220170100801507040250100757.5
UNITSnsnsnsnsnsnsnsnsnsnsnsnspF
Minimum Data Setup
Time
TABLE4.POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETERSupply CurrentN Threshold VoltageN Threshold VoltageDelta
P Threshold VoltageP Threshold VoltageDeltaFunctional
SYMBOLIDDVNTH∆VTNVTP∆VTPF
CONDITIONS
VDD = 20V, VIN = VDD or GNDVDD = 10V, ISS = -10µAVDD = 10V, ISS = -10µAVSS = 0V, IDD = 10µAVSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GNDVDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL TPLH
VDD = 5V
1, 2, 3, 4
+25oC
NOTES1, 41,41,41,41,41
TEMPERATURE
+25oC+25oC+25oC+25oC+25oC+25oC
MIN--2.8-0.2-MAX25-0.2±12.8±1
UNITSµAVVVVV
VOH>VOL < VDD/2VDD/2-1.35 x
+25oC Limit
ns
NOTES:1.All voltages referenced to device GND.
2.CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3.See Table 2 for +25oC limit.4.Read and Record
TABLE5.BURN-IN AND LIFE TEST DELTA PARAMETERS +25oCPARAMETER
Supply Current - MSI-2Output Current (Sink)Output Current (Source)
SYMBOLIDDIOL5IOH5A
± 1.0µA
± 20% x Pre-Test Reading± 20% x Pre-Test Reading
DELTA LIMIT
4
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Specifications CD4514BMS, CD4515BMS
TABLE6.APPLICABLE SUBGROUPS
CONFORMANCE GROUPInitial Test (Pre Burn-In)Interim Test 1 (Post Burn-In)Interim Test 2 (Post Burn-In)PDA (Note 1)
Interim Test 3 (Post Burn-In)PDA (Note 1)Final TestGroup AGroup B
Subgroup B-5Subgroup B-6
Group D
MIL-STD-883 METHOD100% 5004100% 5004100% 5004100% 5004100% 5004100% 5004100% 5004Sample 5005Sample 5005Sample 5005Sample 5005
GROUP A SUBGROUPS
1, 7, 91, 7, 91, 7, 91, 7, 9, Deltas
1, 7, 91, 7, 9, Deltas2, 3, 8A, 8B, 10, 111, 2, 3, 7, 8A, 8B, 9, 10, 111, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 91, 2, 3, 8A, 8B, 9
Subgroups 1, 2 3
Subgroups 1, 2, 3, 9, 10, 11IDD, IOL5, IOH5A
READ AND RECORDIDD, IOL5, IOH5AIDD, IOL5, IOH5AIDD, IOL5, IOH5A
NOTE:1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE7.TOTAL DOSE IRRADIATION
MIL-STD-883 METHOD
5005
TEST
PRE-IRRAD1, 7, 9
POST-IRRADTable 4
READ AND RECORDPRE-IRRAD
1, 9
POST-IRRADTable 4
CONFORMANCE GROUPSGroup E Subgroup 2
TABLE8.BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTIONStatic Burn-In 1 (Note 1)Static Burn-In 2 (Note 1)Dynamic Burn-In (Note 1)Irradiation(Note 2)NOTES:
1.Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2.Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V
OPEN4-11, 13-204-11, 13-20
-GROUND1-3, 12, 21-23
122, 3, 12
VDD241-3, 21-2421, 22, 24
4-11, 13-20
1
23
9V ± -0.5V
50kHz
25kHz
5
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CD4514BMS, CD4515BMS
Logic DiagramVDD ABCDABCDABCD11S09S110S287654S3S4S5S6S7VSSABCDABCDSRQQQQQQQQABCDDCBAABCDABCDABCDABCDABCDABCDABCDABCDRDATA 12*DATA 23*SRDATA 321*SR18S817S920S1019S1114S1213S1316S1415S15DATA 422*SSTROBE1**INHIBIT23ABCDABCD*All inputs protected by CMOS protection network.THESE INVENTERS USED ONLY ON CD4515BMSFIGURE 1.LOGIC DIAGRAMTRUTH TABLEDECODER INPUTSINHIBIT000000000000000011 = HIGH LEVELD0000000011111111XC0000111100001111XB0011001100110011XA0101010101010101XSELECTED OUTPUT CD4514BMS = LOGIC 1 (HIGH)CD4515BMS = LOGIC 0 (LOW)S0S1S2S3S4S5S6S7S8S9S10S11S12S13S14S15AllOutputs=0,CD4514BMSAll Outputs = 1, CD4515BMSX = DON’T CARE0 = LOW LEVEL6
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CD4514BMS, CD4515BMS
Typical Performance Characteristics
OUTPUT LOW (SINK) CURRENT (IOL) (mA)OUTPUT LOW (SINK) CURRENT (IOL) (mA)AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
302520151050GATE-TO-SOURCE VOLTAGE (VGS) = 15V15.012.510.07.55.02.5055V101510V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V10V5V51015DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2.TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15-10-5
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5VFIGURE 3.MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15-10-5
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-50
0
0-5-10-15
0
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)100
-10V
-20-25
-10V
-10
-15V
-30
-15V
-15
FIGURE 4.TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
STROBE OR DATAPROPAGATION DELAY TIME (tPHL, tPLH) - ns550500450400350300250200150100500
10V15V20
406080
LOAD CAPACITANCE (CL) (pF)
100
AMBIENT TEMPERATURE (TA) = +25oCSUPPLY VOLTAGE (VDD) = 5V
FIGURE 5.MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
INHIBIT PROPAGATION DELAY TIME (tPHL, tPLH) - nsAMBIENT TEMPERATURE (TA) = +25oC
350300250200150100500
10V15VSUPPLY VOLTAGE (VDD) = 5V
20
406080
LOAD CAPACITANCE (CL) (pF)
FIGURE 6.TYPICAL STROBE OR DATA PROPAGATION
DELAY TIME vs LOAD CAPACITANCEFIGURE 7.TYPICAL INHIBIT PROPAGATION DELAY TIME vs
LOAD CAPACITANCE
7
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CD4514BMS, CD4515BMS
Typical Performance Characteristics (Continued)AMBIENT TEMPERATURE (TA) = +25oCTRANSITION TIME (fTHL, fTLH) (ns)STROBE OR DATAPROPAGATION DELAY TIME (tPLH, tPHL) - ns)AMBIENT TEMPERATURE (TA) = +25oCLOAD CAPACITANCE (CL) = 50pF500200SUPPLY VOLTAGE (VDD) = 5V40015030010010V5015V200100000020406080100LOAD CAPACITANCE (CL) (pF)5101520LOAD CAPACITANCE (CL) (pF)25FIGURE 8.TYPICAL LOW-TO-HIGH TRANSITION TIME vs LOAD CAPACITANCE106105POWER DISSIPATION (PD) - µWFIGURE 9.TYPICAL STROBE OR DATA PROPAGATIONDELAY TIME vs SUPPLY VOLTAGEAMBIENT TEMPERATURE (TA) = +25oCSUPPLY VOLTAGE(VDD) = 15V10V5V10V10410310210CL = 50pFCL = 15pF24681101102FREQUENCY (f) (kHz)24682468103246810410.TYPICAL POWER DISSIPATION vs FREQUENCYWaveformsDATA50%tStr, tf = 20nsSTROBE50%tWFIGURE 11.WAVEFORMS FOR SETUP TIME AND STROBE PULSE WIDTH8
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CD4514BMS, CD4515BMS
Chip Dimensions and Pad Layouts
074706050403020100
4-10(0.102-0.254)
71-79(1.804-2.006)
10
20
30
40
50
60
70
80
90
100110
112
109-117(2.769-2.971)
Dimensions in parentheses are in milimeters and arederived from the basic inch dimensions as indicated.Grid graduations are in mils (10-3 inch.)
METALLIZATION:Thickness: 11kÅ − 14kÅ, AL.PASSIVATION:
10.4kÅ - 15.6kÅ, Silane
BOND PADS:0.004 inches X 0.004 inches MINDIE THICKNESS:0.0198 inches - 0.0218 inches
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which mayresult from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com
9
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